The present invention relates to a method for manufacturing a semiconductor device, with which a contact plug to be connected to a transistor or the like formed on a silicon substrate is formed.
In a dynamic random access memory (DRAM) formed of one transistor and one capacitor, as the degree of integration of integrated circuits increases, demand has arisen for increasing the area of the memory cell and the storage capacity. To meet this demand, a technique has been proposed with which a material having a higher dielectric constant, e.g., tantalum oxide (Ta2O5), is used to form a dielectric film (capacitor insulating film) which forms a capacitor, so that the capacity is increased without enlarging the memory cell area.
When a material having a higher dielectric constant, e.g., tantalum oxide, is used to form a dielectric film, after a tantalum oxide film is formed, a postprocess such as annealing or UV treatment is performed, so that a desired dielectric constant can be obtained. For this purpose, an underlying layer which has already been formed when a capacitor insulating film is to be formed must have thermal resistance against the annealing. With this background, a technique has been developed with which a refractory metal such as tungsten is used to form a contact plug for connecting the transistor of the memory cell and a capacitor to each other, thus decreasing the resistance.
The arrangement of the contact plug described above will be briefly described by way of an example in which the contact plug is to be connected to a transistor. As shown in FIG. 8, a transistor formed of a gate electrode 803 and source and drain 804 is formed on a silicon substrate 801. The gate electrode 803 Is formed through a gate Insulating film 802, and an impurity region is formed by ion implantation using the gate electrode 803 as a mask, thus forming the source and drain 804.
In the above arrangement, contact plugs 806 to be connected to the source and drain 804 are formed in an interlayer dielectric film 805 formed over the entire area of the silicon substrate 801 including the portion above the gate electrode 803. Each contact plug 806,is formed of a titanium layer 806a, TIN layer 806b, and filled portion 806cof tungsten. The respective layers of titanium, TIN, and tungsten are formed by chemical vapor deposition (CVD) or the like.
The titanium layer 806a is provided to decrease the contact resistance at the interface of the silicon substrate 801. The TiN layer 806b ensures high bonding strength between tungsten and the substrate. The contact plug 806 is basically made of tungsten. When tungsten is used, a comparatively low resistance can be obtained. It is also possible to bury a thick TiN layer 806b, so that the contact plug can be formed of only TiN.
As a smaller feature size is demanded to increase the degree of integration, it has become necessary to realize a higher aspect ratio in forming a contact plug. The conventional contact plug described above, however, is becoming difficult to form with a higher aspect ratio. This is because as the aspect ratio increases, to bury tungsten becomes difficult. When a contact plug is to be formed by forming a thick TIN layer, although the TiN film can be buried in a hole having a high aspect ratio, as the thickness of the TiN film increases, the stress of TiN increases, and problems such as cracking in the formed contact plug occur.